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Home / MISC Areas / Mattel JuiceBox
nandwrite fix
fix for address select, cards 64MB and larger

New Messagenandwrite fix (modified 0 times) sweetlilmre
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Hi,

After much bashing of the old head, I found a bug in nandwrite for devices > 32MiB.
The error is in the address selection for the block erase code. To fix this for these large devices,
simply uncomment the line that reads:

*nand_byte=((sector >> 16) & 0xff);

in the nand_erase() function.
Larger cards require 3 address cycles.

In this vein I have managed to port the NAND driver from the linux-2.4.34 to a small stand alone library,
and will release it when it is a little friendlier. This will provide software ECC support,
arbitrary sized / positioned writes and some other niceness (which may, or may not be of use :))

-(e)

02-04-2007 11:59:18

New MessageRE:nandwrite fix (modified 0 times) unix_guy
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I prefer to take the Microsoft view of this. This isn't a bug, it's a undocumented feature ;) My apologies to DavidM348 and my thanks to sweetlilmre for correcting my sloppy programming.
-unix_guy
02-04-2007 13:38:07

New MessageRE:nandwrite fix (modified 0 times) DavidM348
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No apologies necessary - I am grateful to everyone who has contributed info on JB hacking. I've learned more from you guys than I ever would have on my own.

Based on the stuff I was seeing, I never would have suspected the erase block routine. But I just tried it with the extra address byte, and indeed it does work! Successful erase/write/read of sector 0 and above.

Thanks again all! Now on to writing some JB apps :)

-David

02-04-2007 22:08:22

New MessageRE:nandwrite fix (modified 0 times) sweetlilmre
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unix_guy:

Hey, I couldn't have found the fix if you hadn't written the excellent program! :)
Some questions for you:

- In most of the docs I read, they make reference to the NCE line (CHIP ENABLE).
Where is this set? Or isn't it for this implementation?

- You call mmc_idle() in your code. Why is it necessary to disable SPI?

- To read from the SD card with the clever MMC hack, I assume I would have to implement a FAT16 driver on top of the MMC code.
Is this correct? (Program NAND from SD contents)

(I am pretty much brand new to hardware :))

-(e)

02-05-2007 00:22:33

New MessageRE:nandwrite fix (modified 0 times) unix_guy
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As I have stated before, most of my code is based on the original juiceboxcode test source code written by others. I have just extended the code and put in additional "glue" code to make it more useful for my applications.
People like prpplague,jbfan,newell, BradleyBell, jasonharper and others know more about how the juicebox really works. I just have a knack for putting pieces together.
To answer your questions:
1) I don't know. I just looked at the juiceboxcode test source code and followed their lead, (just writing to the device address (memory mapped IO) seems to do the chip enable, the people listed above can probably explain this better).
2) My best guess is that the SPI can be a shared bus so devices should tri-state(ie disconnect) their output when there are not using the bus.
3)Yes that what I did when I ported the fat16 drivers for the fatjbox(see elinuxwiki) or my previous post (New Juice box application software to execute programs from SD/MMC). I have had some problems when trying to program the nand when not executing the nandwrite routine from a clean boot. You may encounter the same problem. My guess is there is something in the startup code that resets the
nand interface and that using the sd/mmc interface seems to cause nand programming problems. I have not revisited the problem because once I could write to the sd card using the fat16 drivers I didn't need to write to the nand very often.
02-05-2007 18:53:41

New MessageRE:nandwrite fix (modified 0 times) jbfan
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- In most of the docs I read, they make reference to the NCE line (CHIP ENABLE).
Where is this set? Or isn't it for this implementation?
The connection list shows pin 15 (nCE) connected to GND. Doing this permanently enables the xD card.

-J

02-06-2007 21:16:39

New MessageRE:nandwrite fix (modified 0 times) sweetlilmre
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Aha!

Thanks for this info. So the n in nCE is 'active low' i.e. to GND?
What would active high be?
-(e)

02-08-2007 07:11:26

New MessageRE:nandwrite fix (modified 0 times) jbfan
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What would active high be?
Probably just CE.
Low active can also be expressed with a "/" (CE/). "#" (#CE) or a bar over the signal/pin name (like an underline but over the top of the word).
Don't totally rely on this you really need to read the data sheet for the part (or family of parts like NAND) you are using to be sure of active high/low of any signal.

-J

02-08-2007 17:50:41

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