I have been playing with the JB off and on for a while now. Here are a few observations;
32M NAND;
Had a problem a while ago using jtag to read a 32M part; most data was coming back 0xFF. The same routine worked fine on a 128M NAND and the 32M Matrix OTP.
The error was fixed by removing the fourth address cycle from the routine. The data sheet for the 32M part spells out that only three address bytes are needed but sending a fourth byte is supported. The timing diagram shows the extra byte being sent during busy, i.e. right after the previous byte. With jtag doing the bus transactions, either the write or ALE low is happening too long after the process begins. Not an issue with real code running on the JB but anyone using NAND in an application where an interrupt could cause a long delay may need to allow for this.
Buffering nOE;
As I had reported before - connecting a logic analyzer to the Juiceware slot caused problems with the Juicebox booting. I traced this to the nOE line's weak driver. Buffering the nOE (and the nWR) on my breakout hack solved the problem. Still having some data capture issues on the analyzer but otherwise everything is working.
Multiple chip cartridge;
You may have noticed that the cartridge portion of the memory diagnostics runs the cartridge test four times, each pass with the same result (checksum). This always bothered me, why run the exact same test four times?
I noticed that the Juiceware chip gets IDed and the first sector is read several times on boot. Each time the first sector is read the "unused" pins on the connector are showing a different pattern.
I decided to try piggybacking a second OTP ROM on an existing Juiceware cartridge and wired the nCE from each chip to the first two "unused" IOs, pins 2 and 4, on the connector (normally the nCE is tied low -- always enabled). The result is that the memory test now sees two cartridges present and two empty.
Unfortunately when playing the Juiceware cartridge only one video gets shown; the chip with its nCE tied to pin 2 of the connector. So this information is not useful for making a cartridge with multiple videos. But it could help with reading and writing a NAND Flash while other things (DRAM) are being accessed or having more than one chip on a cartridge (a boot ROM and a user flash?).
Booting from the cartridge;
Another thing noticed during boot is that offset 0x1C8(?) (not sure of the exact location, my notes are at work) of the first sector is used to point to another location on the cartridge. The boot sequence is; read the first sector, read the sector pointed to by location 0x1C8, read sector 0 a bunch more times, then read sectors 1 through 0x79. This appears to be enough data to get to the menu (play/info/about) on the cartridge. I think this is similar to what newell and prpplague have reported seeing from the debugger/code side.
It's been a long winter, anyone else had the time to do anything fun with their Juicebox setup?
-J
