6. Flash Disaster Recovery
As mentioned above, the wireless interface device 100 includes the flash memory devices 742-748 (FIG. 25). As will be discussed in more detail below, the flash memory devices enable user software upgrades by way of the radio interface 960 (FIG. 16). Should power be lost during the programming, the data within the flash memory devices 742-748 will be corrupted, which could result in the system failing to boot.
In order to enable recovery from such a condition, recovery BIOS is stored in a protected sector of the flash memory device 742, which will be unaffected during reprogramming. In addition, a serial port interface 790 (FIG. 30) is provided to enable the flash memory devices 742-748 to be programmed in such a condition by an alternative wired source following a normal boot-up. Unfortunately, the configuration of the flash memory device 742 may result in the system failing to boot. More particularly, disaster recovery BIOS is not stored at the uppermost address of the flash memory device 742. Each flash memory device 742-748 are 512K.times.8-bit devices. With reference to Table 5 above, the flash memory device 742 is mapped to the address range $0C0000-$0FFFFF. The recovery BIOS is contained in the lower half of that range (i.e. $0E0000-$0FFFF).
On a normal boot-up, the system begins executing code at the top of the address range (i.e. $0C0000-ODFFFF) flash memory device 742 by way of the system address bit SA18. More particularly, on a normal boot-up a test mode signal TEST.sub.-- MODE, available at port 1.1 of the keyboard controller 125 (FIG. 15) is pulled high by the keyboard controller 125 during boot-up, which enables the buffer 762 (FIG. 17) which, in turn, enables another buffer 760 to enable the system address bit SA18 during boot-up. When the system address bit SA18 is enabled, the system begins executing code at the top of the address range ($0C0000) of the flash memory device 742. However, during a condition when the data in the top half of the address range ($0C00000-0DFFFFF) becomes corrupt as a result of a problem occurring during reprogramming, the system may not boot during such a condition.
In order to solve this problem, the system address bit SA18 is forced low. By forcing the system address bit SA18 low, the system will begin executing code from the protected area of the flash device 742 in the address range ($0E0000-$0FFFF) during such a condition where the disaster recovery BIOS resides in a protected sector. In particular, the system address bit SA18 is applied to the buffer 760 (FIG. 17), which is under the control of the test mode signal TEST.sub.-- MODE by way of the buffer 762. The output of the buffer 760 is a signal FLIP.sub.-- SA18, which is applied to the address pin A18 (FIG. 25) on the flash memory device 742.
During a normal boot-up, the test mode signal TEST.sub.-- MODE will enable the buffer 762 (FIG. 17) and, in turn, the buffer 760 to cause the system address bit SA18 to drive the signal FLIP.sub.-- SA18. During a condition when the code in the flash memory device 742 becomes corrupt, the test mode signal TEST.sub.-- MODE is forced low, which, in turn, forces the signal FLIP.sub.-- SA18 low, resulting in the system executing code from the protected area (i.e. $0E0000-0FFFF) of the flash memory device 742 during such a condition to enable the flash memory device 742 (FIG. 25) to be reprogrammed by way of the serial interface 790 (FIG. 30).
There are various ways in which to force the test mode signal TEST.sub.-- MODE low during reprogramming of the flash memory device 742 by way of the serial interface 790. One way is to externally ground the test mode signal TEST.sub.-- MODE during such a condition. In particular, the test mode signal TEST.sub.-- MODE may be connected to one pin of a two-pin header 1100 (FIG. 30). The other pin of the header 1100 is connected to system ground. During reprogramming of the flash memory device 742, an external jumper (not shown) is inserted into the header 1100 to shunt the test mode signal TEST.sub.-- MODE to system ground to enable the system to execute code from the protected or boot block area of the flash memory device 742 in order to enable the system to be booted. Once the system is booted, the flash memory device 742 is reprogrammed by way of the serial interface 894 (FIG. 29). Once reprogramming is complete, the shunt is removed from the header 1100 (FIG. 30) and the adapter plug 790 is removed, restoring the system to normal operation.
